| IP명 | Single-ended Sense Amplifier with Precharging Process Including Offset Cancellation | ||
|---|---|---|---|
| Category | Analog | Application | Memory |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1.5V |
| IP유형 | Hard IP | 동작속도 | 100MHz |
| 검증단계 | Silicon | 참여공정 | SS28-2402 |
| IP개요 | 1.Comparison proposed-Single-ended Bit Line Sense Amplifier with Alpha Sense Amplifier 2.Comparison Advanced differential Bit Line Sense Amplifier with Alpha Sense Amplifier 3.16×16 VMM array designed based on a CTF cell with improved linearity to implement a deep neural network (DNN) architecture for MNIST computation. |
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- 레이아웃 사진 -
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