| IP개요 |
An energy-efficient hardware accelerator solving partial differential equations (PDEs) designed to improve energy efficiency significantly and reduce computational latency. This is achieved by integrating an AdaptiveGrid Control Unit (AGCU), which dynamically adjusts the computational grid to minimize operations while preserving solution accuracy, and an optimized dataflow architecture for enhanced energy savings. The design was entirely implemented in digital circuits, synthesized using the standard cell library, and fabricated in Samsung 28nm technology |
